1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a semiconductor die packaging technology which provides improved heat radiation performance and improved electrical characteristics for a semiconductor die mounted on the element-mounting surface of a sintered substrate which is sealed with a sealing cap.
2. Description of Prior Art
A semiconductor die is frequently a LSI logic circuit having a large number of input and output signals. The semiconductor die, or chip, is commonly sealed within a pin grid array (PGA)-type package, which can be provided with a large number of external terminals, and is therefore well suited as a package for the above-mentioned semiconductor chip. However, since the LSI logic circuit generates large amounts of heat, the PGA-type package must also have a considerable heat-radiating capability.
In a PGA-type package, a semiconductor chip is mounted on a central portion of the element-mounting surface of an electrically insulating sintered substrate. The sintered substrate is obtained, for example, by sintering and molding alumina at a high temperature. This substrate material exhibits excellent heat conductivity. The semiconductor chip is sealed in a cavity that is formed in the sintered substrate and is then covered by a sealing cap which is adhered via an adhesion layer formed around the substrate periphery, onto the element-mounting surface the substrate. The sealing cap is composed of, for example, alumina which is the same material as the sintered substrate. The result is that a PGA-type package of this type conducts most of the heat generated by the semiconductor chip out of the package to the sealing cap via a heat transfer path from the chip to the sintered substrate and then to the sealing cap via the adhesion layer.
Electrical connection from the semiconductor chip I/0 pads to the external PGA pins is via a line pattern of a thick conductor film, i.e., a metallized wiring is formed on the element-mounting surface of the sintered substrate of the PGA-type package. The thick conductor film is formed, for example, by applying a tungsten paste film using a screen printing technology method, and then carburizing the paste film at high temperatures.
Japanese Patent Laid-Open No. 132465/1988 discloses a method for increasing the number of external pins attainable using the PGA-type package method for a semiconductor device. According to this method, the thick conductor film is extended up to the peripheral portion of the element-mounting surface of the sintered substrate, i.e., up to the region where the sealing cap is adhered. The external pins, though, are arranged even on the device-mounting surface of the sintered substrate opposed to the region of adhesion. That increases the number of external pins by an amount equal to the number of external pins which are thus arranged on the device-mounting surface of the sintered substrate at position opposed to some regions in the adhesion region.
However, the present inventors have conducted basic study concerning the semiconductor device which employs the aforementioned PGA-type package, and have found the following problems:
The thick conductor film (metallized wiring) that extends on the element-mounting surface of the sintered substrate of the PGA-type package has a thickness of about 30 um and a width of about 200 um. The width, together with the minimum spacing limits the arrangement of external pins. Moreover, the thick conductor film is formed by carburizing a metal paste which has both a high sheet resistance (approaching 30 milliohms/.quadrature.) and a large parasitic capacitance, because of its wide surface area as described above. This results in a high RC time constant which in turn lowers the operational clock rate of the packaged semiconductor chip.
Furthermore, because of its large thickness, the thick conductor film produces a resistance in the heat transfer path from the sintered substrate to the sealing cap. The reason for this increased heat resistance is that the part of the thick conductor film that extends up to the peripheral portion of the element-mounting surface of the sintered substrate substantially decreases the adhesion area in the adhesion region between the sintered substrate and the sealing cap. The reduced adhesion area increases the heat resistance of the heat transfer path across the adhesion region, and therefore the heat-radiating performance of the semiconductor device decreases.